MIPS R4000 Microprocessor User's Manual 323
System Interface
Secondary-Cache Mode
In secondary-cache mode, if the new cache line replaces a current cache
line that is in either the dirty exclusive or dirty shared state, the current
cache line must be written back before the new line can be loaded in the
primary and secondary caches. The processor requests issued are a
function of the page attributes listed below.
Noncoherent Page Attribute
If the current cache line must be written back, and the coherency attribute
for the requested cache line is noncoherent, the processor issues a cluster
consisting of a noncoherent block read-with-write-forthcoming request
for the cache line that contains the store target location, followed by a
block write request for the current cache line.
If the current cache line does not need to be written back and the
coherency attribute for the page that contains the requested cache line is
noncoherent, the processor issues a noncoherent block read request for the
cache line that contains the store target location.
Sharable or Exclusive Page Attribute
If the current cache line must be written back and the coherency attribute
for the page that contains the requested cache line is sharable or exclusive,
the processor issues a cluster consisting of a coherent block read request
with exclusivity and write forthcoming, followed by a processor block
write request for the current cache line.
If the current cache line does not need to be written back and the coherency
attribute for the page that contains the requested cache line is sharable or
exclusive, the processor issues a coherent block read request that also
requests exclusivity.
Update Page Attribute
If the current cache line must be written back and the coherency attribute
for the page that contains the requested cache line is update, and potential
updates are enabled, the processor issues a cluster consisting of a coherent
block read-with-write-forthcoming request, followed by a potential
update request, followed by a write request for the current cache line.
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