Mips Technologies R4000 - Cache Organization, Operation, and Coherency; Memory Organization

Chapter 11
244 MIPS R4000 Microprocessor User's Manual
11.1 Memory Organization
Figure 11-1 shows the R4000 system memory hierarchy. In the logical
memory hierarchy, caches lie between the CPU and main memory. They
are designed to make the speedup of memory accesses transparent to the
user. Each functional block in Figure 11-1 has the capacity to hold more
data than the block above it. For instance, physical main memory has a
larger capacity than the secondary cache. At the same time, each
functional block takes longer to access than any block above it. For
instance, it takes longer to access data in main memory than in the CPU
on-chip registers.
Figure 11-1 Logical Hierarchy of Memory
Registers
Registers
Main Memory
Primary Cache
R4000 CPU
I-cache
D-cache
Increasing Data
Capacity
S-cache
Disk, CD-ROM,
Tape, etc.
RegistersCachesMemoryPeripherals
Faster Access
Time