Mips Technologies R4000 - Page 273

MIPS R4000 Microprocessor User's Manual 243
Cache Organization, Operation, and Coherency
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This chapter describes in detail the cache memory: its place in the R4000
memory organization, individual operations of the primary and
secondary caches, cache interactions, and an example of a cache coherency
request cycle. The chapter concludes with a description of R4000
processor synchronization in a multiprocessor environment.
This chapter uses the following terminology:
• The primary cache may also be referred to as the P-cache.
• The secondary cache may also be referred to as the S-cache.
• The primary data cache may also be referred to as the D-cache.
• The primary instruction cache may also be referred to as the
I-cache.
These terms are used interchangeably throughout this book.