Chapter 10
242 MIPS R4000 Microprocessor User's Manual
Table 10-1 shows the encoding of processor’s status for pins Status(7:4) or
Status(3:0).
Table 10-1 Encoding of R4400 Processor Internal State by Status(7:4) or Status(3:0)
Status(7:4) or
Status(3:0)
Cycle Processor Internal Status
0
Run cycle
Other integer instruction (not load/store/conditional
branch. Includes ERET and Jump instructions.)
1
Run cycle Load
2
Run cycle Untaken conditional branch
3
Run cycle Taken conditional branch
4
Run cycle Store
5
Reserved
6
Stall cycle MP stall
7
Run cycle Integer instruction killed by slip
8
Stall cycle Other stall type
9
Stall cycle Primary instruction cache stall
a
Stall cycle Primary data cache stall
b
Stall cycle Secondary cache stall
c
Run cycle
Other floating-point instruction (not load, store, or
conditional branch)
d
Run cycle Instruction killed by branch, jump, or ERET
e
Run cycle Instruction killed by exception
f
Run cycle Floating-point instruction killed by slip
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