Chapter 2
42 MIPS R4000 Microprocessor User's Manual
Special Instructions
Special instructions allow the software to initiate traps; they are always
R-type. For more information about special instructions, refer to the
individual instruction as described in Appendix A.
Exception Instructions
Exception instructions are extensions to the MIPS ISA. For more
information about exception instructions, refer to the individual
instruction as described in Appendix A.
Coprocessor Instructions
Coprocessor instructions perform operations in their respective
coprocessors. Coprocessor loads and stores are I-type, and coprocessor
computational instructions have coprocessor-dependent formats.
Individual coprocessor instructions are described in Appendices A (for
CP0) and B (for the FPU, CP1).
CP0 instructions perform operations specifically on the System Control
Coprocessor registers to manipulate the memory management and
exception handling facilities of the processor. Appendix A details CP0
instructions.