Mips Technologies R4000 - Basic System Clocks

MIPS R4000 Microprocessor User's Manual 199
R4000 Processor Signal Descriptions
8
This chapter describes the signals used by and in conjunction with the
R4000 processor. The signals include the System interface, the Clock/
Control interface, the Secondary Cache interface, the Interrupt interface,
the Joint Test Action Group (JTAG) interface, and the Initialization
interface.
Signals are listed in bold, and low active signals have a trailing asterisk—
for instance, the low-active Read Ready signal is RdRdy*. The signal
description also tells if the signal is an input (the processor receives it) or
output (the processor sends it out).
Figure 8-1 illustrates the functional groupings of the processor signals.