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Mips Technologies R4000 - Uncompelled Change to Slave State

Mips Technologies R4000
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MIPS R4000 Microprocessor User's Manual 301
System Interface
Uncompelled Change to Slave State
An uncompelled change to slave state is the transition of the System
interface from master state to slave state, initiated by the processor when
a processor read request is pending. Release* is asserted automatically
after a read request or cluster (see Clusters, later in this chapter, for a
definition of a cluster). An uncompelled change to slave state occurs either
during or some number of cycles after the issue cycle of a read request, or
either during or some number of cycles after the last cycle of the last
request in a cluster.
The uncompelled release latency depends on the state of the cache, the
presence or absence of a secondary cache, and the secondary cache
parameters (see Release Latency, in this chapter). After an uncompelled
change to slave state, the processor returns to master state at the end of the
next external request. This can be a read response, or some other type of
external request.
An external agent must note that the processor has performed an
uncompelled change to slave state and begin driving the SysAD bus along
with the SysCmd bus. As long as the System interface is in slave state, the
external agent can begin an external request without arbitrating for the
System interface; that is, without asserting ExtRqst*.
After the external request, the System interface returns to master state.
Whenever a processor read request is pending, after the issue of a read
request or after the issue of all of the requests in a cluster, the processor
automatically switches the System interface to slave state, even though the
external agent is not arbitrating to issue an external request. This
transition to slave state allows the external agent to return read response
data.

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