Mips Technologies R4000 - Floating-Point Unit

MIPS R4000 Microprocessor User's Manual 121
CPU Exception Processing
Soft Reset and NMI Exception Process
Figure 5-16 shows the Soft Reset and NMI exception process.
Figure 5-16 Soft Reset and NMI Exception Processing
General Exception Process
Figure 5-17 shows the process used for exceptions other than Reset, Soft
Reset, NMI, and Cache Error.
Figure 5-17 General Exception Processing (Except Reset, Soft Reset, NMI, and Cache Error)
T: ErrorEPC ← RestartPC /* If the instruction is in a branch delay slot, RestartPC */
/* holds the value of PC-4, otherwise RestartPC = PC */
SR ← SR
31:23
|| 1 || 0 || 1 || SR
19:3
|| 1 || SR
1:0
If R4400 then
CacheErr ← CacheErr
31:24
|| 0 || CacheErr
22:0
endif
PC ← 0xFFFF FFFF BFC0 0000
T: if SR
1
= 0 then /* if not EXL */
EPC ← RestartPC /* If the instruction is in a branch delay slot, */
/* RestartPC holds the value of PC-4, */
/* otherwise RestartPC = PC */
Cause ← BD || 0 || CE || 0
12
|| Cause
15:8
|| 0 || ExcCode || 0
2
if TLBrefill then vector ← 0x000
elseif XTLBrefill then vector ← 0x080
else /* not a miss */ vector ← 0x180
else
Cause ← Cause
31
|| 0 || CE || 0
12
|| Cause
15:8
|| 0 || ExcCode || 0
2
vector ← 0x180
endif
SR ← SR
31:2
|| 1 || SR
0
/* EXL */
if SR
22
= 1 then
PC ← 0xFFFF FFFF BFC0 0200 + vector
else
PC ← 0xFFFF FFFF 8000 0000 + vector
endif