Mips Technologies R4000 - Page 126

Chapter 4
96 MIPS R4000 Microprocessor User's Manual
Figure 4-20 TLB Address Translation
User
Mode?
VPN
Match?
ASID
Match?
G
= 1?
Valid
V
= 1?
D
= 1?
No
Yes
Yes
Yes
No
No
Yes
Write?
Yes
No
Yes
TLB
Invalid
TLB
Mod
Exception
TLB
Refill
Exception
VPN
and
ASID
Virtual Address (Input)
C =
010?
Yes
No
Access
Main
Access
Cache
Physical Address (Output)
Memory
No
Valid
Dirty
Non-
cacheable
Global
No
No
Mode?
Sup
Address
Error
Exception
Yes
No
Yes
Unmapped
Access
Yes
Exception
No
No
No
Yes
32-bit
address?
Yes
XTLB
Refill
No
Address
Error
Yes
Address?
For valid
address space, see
the section describing
Operating Modes
in this chapter.
Valid
Address?
Valid
Address?