MIPS R4000 Microprocessor User's Manual 151
Floating-Point Unit
6
This chapter describes the MIPS floating-point unit (FPU) features,
including the programming model, instruction set and formats, and the
pipeline.
The FPU, with associated system software, fully conforms to the
requirements of ANSI/IEEE Standard 754–1985, IEEE Standard for Binary
Floating-Point Arithmetic. In addition, the MIPS architecture fully supports
the recommendations of the standard and precise exceptions.