Chapter 6
162 MIPS R4000 Microprocessor User's Manual
When a floating-point exception is taken, no results are stored, and the
only state affected is the Cause bit.
Enable Bits
A floating-point exception is generated any time a Cause bit and the
corresponding Enable bit are set. A floating-point operation that sets an
enabled Cause bit forces an immediate exception, as does setting both
Cause and Enable bits with CTC1.
There is no enable for Unimplemented Operation (E). Setting
Unimplemented Operation always generates a floating-point exception.
Before returning from a floating-point exception, software must first clear
the enabled Cause bits with a CTC1 instruction to prevent a repeat of the
interrupt. Thus, User mode programs can never observe enabled Cause
bits set; if this information is required in a User mode handler, it must be
passed somewhere other than the Status register.
For a floating-point operation that sets only unenabled Cause bits, no
exception occurs and the default result defined by IEEE 754 is stored. In
this case, the exceptions that were caused by the immediately previous
floating-point operation can be determined by reading the Cause field.
Flag Bits
The Flag bits are cumulative and indicate that an exception was raised by
an operation that was executed since they were explicitly reset. Flag bits
are set to 1 if an IEEE 754 exception is raised, otherwise they remain
unchanged. The Flag bits are never cleared as a side effect of floating-point
operations; however, they can be set or cleared by writing a new value into
the Status register, using a Move To Coprocessor Control instruction.
When a floating-point exception is taken, the flag bits are not set by the
hardware; floating-point exception software is responsible for setting
these bits before invoking a user handler.
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