Chapter 6
174 MIPS R4000 Microprocessor User's Manual
Table 6-14 Floating-Point Operation Latencies
(a)........These operations are illegal.
(b)........These operations are undefined.
Operation
Pipeline Cycles
Operation
Pipeline Cycles
SDWL S DW L
ADD.fmt 4 4 (a) (a) CVT.[W,L].fmt 4 4 (a) (a)
SUB.fmt 4 4 (a) (a) C.fmt.cond 3 3 (a) (a)
MUL.fmt 7 8 (a) (a) BC1T (b) 1 (b) (b)
DIV.fmt 23 36 (a) (a) BC1F (b) 1 (b) (b)
SQRT.fmt 54 112 (a) (a) BC1TL (b) 1 (b) (b)
ABS.fmt 2 2 (a) (a) BC1FL (b) 1 (b) (b)
MOV.fmt 1 1 (a) (a) LWC1 (b) 3 (b) (b)
NEG.fmt 2 2 (a) (a) SWC1 (b) 1 (b) (b)
ROUND.[W,L].fmt 4 4 (a) (a) LDC1 (b) 3 (b) (b)
TRUNC.[W,L].fmt 4 4 (a) (a) SDC1 (b) 1 (b) (b)
CEIL.[W,L].fmt 4 4 (a) (a) MTC1 (b) 3 (b) (b)
FLOOR.[W,L].fmt 4 4 (a) (a) MFC1 (b) 3 (b) (b)
CVT.S.fmt (a) 4 6 7 CTC1 (b) 3 (b) (b)
CVT.D.fmt 2 (a) 5 4 CFC1 (b) 2 (b) (b)
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