Mips Technologies R4000 - Page 23

MIPS R4000 Microprocessor User's Manual xxiii
Table of Contents
Snoop ..................................................................................................................... 270
Intervention...........................................................................................................271
Coherency Conflicts.................................................................................................271
How Coherency Conflicts Arise ........................................................................ 272
Processor Coherent Read Requests...............................................................272
Processor Invalidate or Update Requests ....................................................273
External Coherency Requests ........................................................................ 274
System Implications of Coherency Conflicts ...................................................275
System Model................................................................................................... 276
Load...................................................................................................................278
Store...................................................................................................................278
Processor Coherent Read Request and Read Response............................. 278
Processor Invalidate........................................................................................279
Processor Write................................................................................................279
Handling Coherency Conflicts........................................................................... 280
Coherent Read Conflicts.................................................................................280
Coherent Write Conflicts................................................................................ 281
Invalidate Conflicts .........................................................................................282
Sample Cycle: Coherent Read Request............................................................. 283
R4000 Processor Synchronization Support........................................................... 286
Test-and-Set (Spinlock) .......................................................................................286
Counter..................................................................................................................288
LL and SC.............................................................................................................. 289
Examples Using LL and SC................................................................................ 290