MIPS R4000 Microprocessor User's Manual 277
Cache Organization, Operation, and Coherency
Figure 11-12 4-Processor System Illustrating Coherency Transactions
Given this system model, the following operations are described:
• loads and stores
• processor coherent read request and read response
• processor invalidate
• processor write
R4000MC
S-cache
Subsystem 4
System Bus
External
Agent
R4000MC
S-cache
Subsystem 3
External
Agent
R4000MC
S-cache
Subsystem 2
External
Agent
R4000MC
S-cache
Subsystem 1
External
Agent
Main
Memory
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