MIPS R4000 Microprocessor User's Manual A-5
CPU Instruction Set Details
Table A-1 CPU Instruction Operation Notations
COC[
z
] Coprocessor unit
z
condition signal.
BigEndianMem Big-endian mode as configured at reset (0
→ Little, 1 → Big). Specifies the en-
dianness of the memory interface (see LoadMemory and StoreMemory), and
the endianness of Kernel and Supervisor mode execution.
ReverseEndian Signal to reverse the endianness of load and store instructions. This feature is
available in User mode only, and is effected by setting the
RE
bit of the
Status
register. Thus, ReverseEndian may be computed as (SR
25
and User mode).
BigEndianCPU The endianness for load and store instructions (0 → Little, 1 → Big). In User
mode, this endianness may be reversed by setting SR
25
. Thus, BigEndianCPU
may be computed as BigEndianMem XOR ReverseEndian.
LLbit Bit of state to specify synchronization instructions. Set by
LL
, cleared by
ERET
and
Invalidate
and read by
SC
.
T+
i
: Indicates the time steps between operations. Each of the statements within a
time step are defined to be executed in sequential order (as modified by con-
ditional and loop constructs). Operations which are marked
T+i:
are executed
at instruction cycle
i
relative to the start of execution of the instruction. Thus,
an instruction which starts at time
j
executes operations marked T+
i
:
at time
i + j
. The interpretation of the order of execution between two instructions or
two operations which execute at the same time should be pessimistic; the or-
der is not defined.
←
||
Symbol
Assignment.
Bit string concatenation.
+
2’s complement or floating-point addition.
-
2’s complement or floating-point subtraction.
*
2’s complement or floating-point multiplication.
div
2’s complement integer division.
2’s complement modulo.
2’s complement less than comparison.
mod
<
and
Bit-wise logical AND.
or
Bit-wise logical OR.
xor
Bit-wise logical XOR.
nor
Bit-wise logical NOR.
x
y
x
y:z
Replication of bit value
x
into a
y
-bit string. Note:
x
is always a single-bit value.
Selection of bits
y
through
z
of bit string
x
. Little-endian bit notation is always
used. If
y
is less than
z
, this expression is an empty (zero length) bit string.
GPR[
x
]
CPR[
z,x
]
CCR[
z,x
]
Coprocessor unit
z
, general register
x.
Coprocessor unit
z
, control register
x.
Floating-point division.
/
Meaning
General-Register x. The content of GPR[0] is always zero. Attempts to alter
the content of GPR[0] have no effect.
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