Mips Technologies R4000 - Page 526

Appendix A
A-58 MIPS R4000 Microprocessor User's Manual
Operation:
Exceptions:
None
(continued)
DIV
Divide
DIV
← undefined
← undefined
← undefined
HI ← GPR[rs] mod GPR[rt]
T–2: LO ← undefined
T: LO ← GPR[rs] div GPR[rt]
HI
T–1: LO
HI
← undefined
← undefined
← undefined
T–2: LO ← undefined
T: q ← GPR[rs]
31...0
div GPR[rt]
31...0
HI
T–1: LO
HI
LO ← (q
31
)
32
|| q
31...0
HI ← (r
31
)
32
|| r
31...0
r ← GPR[rs]
31...0
mod GPR[rt]
31...0
32
64