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Mips Technologies R4000
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MIPS R4000 Microprocessor User's Manual A-145
CPU Instruction Set Details
Format:
SLTU rd, rs, rt
Description:
The contents of general register rt are subtracted from the contents of
general register rs. Considering both quantities as unsigned integers, if the
contents of general register rs are less than the contents of general register
rt, the result is set to one; otherwise the result is set to zero.
The result is placed into general register rd.
No integer overflow exception occurs under any circumstances. The
comparison is valid even if the subtraction used during the comparison
overflows.
Operation:
Exceptions:
None
SLTU
Set On Less Than Unsigned
31 2526 2021 1516
SPECIAL rs rt
655
rd 0 SLTU
55 6
11 10 6 5 0
0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 1
SLTU
32 T: if (0 || GPR[rs]) < 0 || GPR[rt] then
GPR[rd] 0
31
|| 1
else
GPR[rd] 0
32
endif
64 T: if (0 || GPR[rs]) < 0 || GPR[rt] then
GPR[rd] 0
63
|| 1
else
GPR[rd] 0
64
endif

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