Appendix A
A-158 MIPS R4000 Microprocessor User's Manual
Format:
SWR rt, offset(base)
Description:
This instruction can be used with the SWL instruction to store the contents
of a register into four consecutive bytes of memory, when the bytes cross
a boundary between two words. SWR stores the right portion of the
register into the appropriate part of the low-order word; SWL stores the
left portion of the register into the appropriate part of the low-order word
of memory.
The SWR instruction adds its sign-extended 16-bit offset to the contents of
general register base to form a virtual address which may specify an
arbitrary byte. It alters only the word in memory which contains that byte.
From one to four bytes will be stored, depending on the starting byte
specified.
Conceptually, it starts at the least-significant (rightmost) byte of the
register and copies it to the specified byte in memory; then copies bytes
from register to memory until it reaches the high-order byte of the word in
memory.
No address exceptions due to alignment are possible.
31 2526 2021 1516 0
SWR base rt
offset
655 16
1 0 1 1 1 0
SWR
Store Word Right
SWR
address 0
address 4
0123
4567
ABCD
register
address 0
address 4
0
D567
123
$24
memory
(big-endian)
before
after
SWR $24,1($0)
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