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Mips Technologies R4000
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MIPS R4000 Microprocessor User's Manual B-5
FPU Instruction Set Details
Floating-Point Loads, Stores, and Moves
All movement of data between the floating-point coprocessor and
memory is accomplished by coprocessor load and store operations, which
reference the floating-point coprocessor General Purpose registers. These
operations are unformatted; no format conversions are performed and,
therefore, no floating-point exceptions can occur due to these operations.
Data may also be directly moved between the floating-point coprocessor
and the processor by move to coprocessor and move from coprocessor
instructions. Like the floating-point load and store operations, move to/
from operations perform no format conversions and never cause floating-
point exceptions.
An additional pair of coprocessor registers are available, called Floating-
Point Control registers for which the only data movement operations
supported are moves to and from processor General Purpose registers.
Floating-Point Operations
The floating-point unit operation set includes:
floating-point add
floating-point subtract
floating-point multiply
floating-point divide
floating-point square root
convert between fixed-point and floating-point formats
convert between floating-point formats
floating-point compare
These operations satisfy the requirements of IEEE Standard 754
requirements for accuracy. Specifically, these operations obtain a result
which is identical to an infinite-precision result rounded to the specified
format, using the current rounding mode.
Instructions must specify the format of their operands. Except for
conversion functions, mixed-format operations are not provided.

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