Mips Technologies R4000 - Page 716

Appendix C
C-4 MIPS R4000 Microprocessor User's Manual
Table C-1 Sequence of Doublewords Transferred Using Subblock Ordering: Address 0010
2
Cycle
Starting Block
Address
Binary Count
Double Word
Retrieved
1 0010 0000 0010
2 0010 0001 0011
3 0010 0010 0000
4 0010 0011 0001
5 0010 0100 0110
6 0010 0101 0111
7 0010 0110 0100
8 0010 0111 0101
9 0010 1000 1010
10 0010 1001 1011
11 0010 1010 1000
12 0010 1011 1001
13 0010 1100 1110
14 0010 1101 1111
15 0010 1110 1100
16 0010 1111 1101