NXP Semiconductors KL25 Series - Page 18

Section number Title Page
27.4.8 Flash Command Operations.........................................................................................................................435
27.4.9 Margin Read Commands.............................................................................................................................440
27.4.10 Flash Command Description........................................................................................................................441
27.4.11 Security........................................................................................................................................................454
27.4.12 Reset Sequence............................................................................................................................................456
Chapter 28
Analog-to-Digital Converter (ADC)
28.1 Introduction...................................................................................................................................................................457
28.1.1 Features........................................................................................................................................................457
28.1.2 Block diagram..............................................................................................................................................458
28.2 ADC Signal Descriptions..............................................................................................................................................459
28.2.1 Analog Power (VDDA)...............................................................................................................................460
28.2.2 Analog Ground (VSSA)...............................................................................................................................460
28.2.3 Voltage Reference Select.............................................................................................................................460
28.2.4 Analog Channel Inputs (ADx).....................................................................................................................461
28.2.5 Differential Analog Channel Inputs (DADx)...............................................................................................461
28.3 Register definition.........................................................................................................................................................461
28.3.1 ADC Status and Control Registers 1 (ADCx_SC1n)...................................................................................462
28.3.2 ADC Configuration Register 1 (ADCx_CFG1)...........................................................................................465
28.3.3 ADC Configuration Register 2 (ADCx_CFG2)...........................................................................................467
28.3.4 ADC Data Result Register (ADCx_Rn).......................................................................................................468
28.3.5 Compare Value Registers (ADCx_CVn).....................................................................................................469
28.3.6 Status and Control Register 2 (ADCx_SC2)................................................................................................470
28.3.7 Status and Control Register 3 (ADCx_SC3)................................................................................................472
28.3.8 ADC Offset Correction Register (ADCx_OFS)...........................................................................................474
28.3.9 ADC Plus-Side Gain Register (ADCx_PG).................................................................................................474
28.3.10 ADC Minus-Side Gain Register (ADCx_MG)............................................................................................475
28.3.11 ADC Plus-Side General Calibration Value Register (ADCx_CLPD).........................................................475
28.3.12 ADC Plus-Side General Calibration Value Register (ADCx_CLPS)..........................................................476
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
18 Freescale Semiconductor, Inc.