NXP Semiconductors KL25 Series - Page 19

Section number Title Page
28.3.13 ADC Plus-Side General Calibration Value Register (ADCx_CLP4)..........................................................476
28.3.14 ADC Plus-Side General Calibration Value Register (ADCx_CLP3)..........................................................477
28.3.15 ADC Plus-Side General Calibration Value Register (ADCx_CLP2)..........................................................477
28.3.16 ADC Plus-Side General Calibration Value Register (ADCx_CLP1)..........................................................478
28.3.17 ADC Plus-Side General Calibration Value Register (ADCx_CLP0)..........................................................478
28.3.18 ADC Minus-Side General Calibration Value Register (ADCx_CLMD).....................................................479
28.3.19 ADC Minus-Side General Calibration Value Register (ADCx_CLMS).....................................................479
28.3.20 ADC Minus-Side General Calibration Value Register (ADCx_CLM4).....................................................480
28.3.21 ADC Minus-Side General Calibration Value Register (ADCx_CLM3).....................................................480
28.3.22 ADC Minus-Side General Calibration Value Register (ADCx_CLM2).....................................................481
28.3.23 ADC Minus-Side General Calibration Value Register (ADCx_CLM1).....................................................481
28.3.24 ADC Minus-Side General Calibration Value Register (ADCx_CLM0).....................................................482
28.4 Functional description...................................................................................................................................................482
28.4.1 Clock select and divide control....................................................................................................................483
28.4.2 Voltage reference selection..........................................................................................................................483
28.4.3 Hardware trigger and channel selects..........................................................................................................484
28.4.4 Conversion control.......................................................................................................................................485
28.4.5 Automatic compare function........................................................................................................................493
28.4.6 Calibration function.....................................................................................................................................494
28.4.7 User-defined offset function........................................................................................................................495
28.4.8 Temperature sensor......................................................................................................................................497
28.4.9 MCU wait mode operation...........................................................................................................................497
28.4.10 MCU Normal Stop mode operation.............................................................................................................498
28.4.11 MCU Low-Power Stop mode operation......................................................................................................499
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 19