NXP Semiconductors KL25 Series - Page 23

Section number Title Page
32.2 Signal description..........................................................................................................................................................574
32.3 Memory map/register description.................................................................................................................................575
32.3.1 PIT Module Control Register (PIT_MCR)..................................................................................................575
32.3.2 PIT Upper Lifetime Timer Register (PIT_LTMR64H)...............................................................................577
32.3.3 PIT Lower Lifetime Timer Register (PIT_LTMR64L)...............................................................................577
32.3.4 Timer Load Value Register (PIT_LDVALn)...............................................................................................578
32.3.5 Current Timer Value Register (PIT_CVALn).............................................................................................578
32.3.6 Timer Control Register (PIT_TCTRLn)......................................................................................................579
32.3.7 Timer Flag Register (PIT_TFLGn)..............................................................................................................580
32.4 Functional description...................................................................................................................................................580
32.4.1 General operation.........................................................................................................................................580
32.4.2 Interrupts......................................................................................................................................................582
32.4.3 Chained timers.............................................................................................................................................582
32.5 Initialization and application information.....................................................................................................................582
32.6 Example configuration for chained timers....................................................................................................................583
32.7 Example configuration for the lifetime timer...............................................................................................................584
Chapter 33
Low-Power Timer (LPTMR)
33.1 Introduction...................................................................................................................................................................587
33.1.1 Features........................................................................................................................................................587
33.1.2 Modes of operation......................................................................................................................................587
33.2 LPTMR signal descriptions..........................................................................................................................................588
33.2.1 Detailed signal descriptions.........................................................................................................................588
33.3 Memory map and register definition.............................................................................................................................588
33.3.1 Low Power Timer Control Status Register (LPTMRx_CSR)......................................................................589
33.3.2 Low Power Timer Prescale Register (LPTMRx_PSR)................................................................................590
33.3.3 Low Power Timer Compare Register (LPTMRx_CMR).............................................................................592
33.3.4 Low Power Timer Counter Register (LPTMRx_CNR)...............................................................................592
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 23