NXP Semiconductors KL25 Series - Page 22

Section number Title Page
31.1.4 Block Diagram.............................................................................................................................................548
31.2 TPM Signal Descriptions..............................................................................................................................................549
31.2.1 TPM_EXTCLK — TPM External Clock....................................................................................................549
31.2.2 TPM_CHn — TPM Channel (n) I/O Pin.....................................................................................................550
31.3 Memory Map and Register Definition..........................................................................................................................550
31.3.1 Status and Control (TPMx_SC)...................................................................................................................552
31.3.2 Counter (TPMx_CNT).................................................................................................................................553
31.3.3 Modulo (TPMx_MOD)................................................................................................................................554
31.3.4 Channel (n) Status and Control (TPMx_CnSC)...........................................................................................555
31.3.5 Channel (n) Value (TPMx_CnV).................................................................................................................557
31.3.6 Capture and Compare Status (TPMx_STATUS).........................................................................................557
31.3.7 Configuration (TPMx_CONF).....................................................................................................................559
31.4 Functional Description..................................................................................................................................................561
31.4.1 Clock Domains.............................................................................................................................................561
31.4.2 Prescaler.......................................................................................................................................................562
31.4.3 Counter.........................................................................................................................................................562
31.4.4 Input Capture Mode.....................................................................................................................................564
31.4.5 Output Compare Mode.................................................................................................................................565
31.4.6 Edge-Aligned PWM (EPWM) Mode...........................................................................................................566
31.4.7 Center-Aligned PWM (CPWM) Mode........................................................................................................568
31.4.8 Registers Updated from Write Buffers........................................................................................................570
31.4.9 DMA............................................................................................................................................................570
31.4.10 Reset Overview............................................................................................................................................571
31.4.11 TPM Interrupts.............................................................................................................................................571
Chapter 32
Periodic Interrupt Timer (PIT)
32.1 Introduction...................................................................................................................................................................573
32.1.1 Block diagram..............................................................................................................................................573
32.1.2 Features........................................................................................................................................................574
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
22 Freescale Semiconductor, Inc.