NXP Semiconductors KL25 Series - Page 21

Section number Title Page
29.13 DAC functional description..........................................................................................................................................535
29.13.1 Voltage reference source select....................................................................................................................535
29.14 DAC resets....................................................................................................................................................................535
29.15 DAC clocks...................................................................................................................................................................535
29.16 DAC interrupts..............................................................................................................................................................536
29.17 CMP Trigger Mode.......................................................................................................................................................536
Chapter 30
12-bit Digital-to-Analog Converter (DAC)
30.1 Introduction...................................................................................................................................................................537
30.2 Features.........................................................................................................................................................................537
30.3 Block diagram...............................................................................................................................................................537
30.4 Memory map/register definition...................................................................................................................................539
30.4.1 DAC Data Low Register (DACx_DATnL).................................................................................................539
30.4.2 DAC Data High Register (DACx_DATnH)................................................................................................540
30.4.3 DAC Status Register (DACx_SR)...............................................................................................................540
30.4.4 DAC Control Register (DACx_C0).............................................................................................................541
30.4.5 DAC Control Register 1 (DACx_C1)..........................................................................................................542
30.4.6 DAC Control Register 2 (DACx_C2)..........................................................................................................542
30.5 Functional description...................................................................................................................................................543
30.5.1 DAC data buffer operation...........................................................................................................................543
30.5.2 DMA operation............................................................................................................................................544
30.5.3 Resets...........................................................................................................................................................544
30.5.4 Low-Power mode operation.........................................................................................................................544
Chapter 31
Timer/PWM Module (TPM)
31.1 Introduction...................................................................................................................................................................547
31.1.1 TPM Philosophy..........................................................................................................................................547
31.1.2 Features........................................................................................................................................................547
31.1.3 Modes of Operation.....................................................................................................................................548
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 21