NXP Semiconductors KL25 Series - Page 78

Signal multiplexing
Module signals
Register
access
16-bit SAR ADC
Peripheral bus
controller 0
Other peripherals
Figure 3-21. 16-bit SAR ADC configuration
Table 3-31. Reference links to related information
Topic Related module Reference
Full description 16-bit SAR ADC 16-bit SAR ADC
System memory map System memory map
Clocking Clock distribution
Power management Power management
Signal multiplexing Port control Signal multiplexing
3.7.1.1 ADC Instantiation Information
This device contains one 16 -bit successive approximation ADC with up to 16-channel.
The ADC supports both software and hardware triggers. The hardware trigger sources are
listed in the Module-to-Module section.
The number of ADC channels present on the device is determined by the pinout of the
specific device package and is shown in the following table.
Table 3-32. Number of KL25 ADC channels
Device Number of ADC channels
MKL25Z32VFM4 7
MKL25Z64VFM4 7
MKL25Z128VFM4 7
MKL25Z32VFT4 13
MKL25Z64VFT4 13
MKL25Z128VFT4 13
MKL25Z32VLH4 14
MKL25Z64VLH4 14
MKL25Z128VLH4 14
MKL25Z32VLK4 14
Table continues on the next page...
Analog
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
78 Freescale Semiconductor, Inc.