BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 45 Document 5722-PG101-R
Figure 22: Transmit Ring Data Structure Architecture Diagram
Host Memory
1-(64K-1) Bytes
Host Buffer
Send Host BD
Ring Control Block
1st
Host Ring
Address
max_len
NIC Ring Address
flags
Host Send Ring #1
Host Send Ring #n
1st
Note: The RCB's host ring
address field points to the first
element of the Ring in the host
(valid only when host send ring
are used). For host based sen
rings, the length of the ring is
fixed at 512 entries. The NIC
ring address points to the first
element of the locally stored rin
(this will be a "copy" of the host
send ring when host send rings
are used).
Cons
Prod
RCB #1
RCB #n
Status Word
unused
RX Prod #1
RX std cons
RX Prod #2
Unused
Status Block
RX big Cons
RX mini Cons
TX Cons #1
Tx Cons #2
RX Prod #nTX Cons #n
Prod
Cons
Mailbox Registers
TX Host Ring #1 Prod
TX Host Ring #2 Prod
TX Host Ring #n Prod
Status Block (80 bytes)
The Status block resides in the NIC memory space
and his periodically DMA'd to the host whenever the
X/RX coalescing timers expire, or whenever the
RX/TX max coalesced frames thresholds are met.
SW can examine the TX consumer indices in the
status block to determine which packets have been
ent by the HW.
The mailbox registers reside on-chip
starting at offset 0x300. Each mailbox
register is 64 bits wide. Wrting the lower
32 bits, triggers and event in the HW.
SW updates the TX Host Ring producer
index to indicate that there are buffer
descriptors ready for the HW to process.
Note: When external memory is
used, 16 rings can be supported.
When external memory is not
present, only 4 rings are supported.
Host
Address
length
rsvd for firmware
Send Buffer
Descriptor
flags
VLAN tag
Data Structures in the host
Data Structures kept on-chip
Transmit Ring Data Scructure is located in the host (as shown below), and the device will keep a local (not shown) copy of the rings.
Rings and buffer descriptors would be solely located in on-chip memory space.
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