Broadcom BCM5722 - Table 211: Receive Rules Value;Mask Register (Offset 0 X484); Table 212: Receive Rules Configuration Register (Offset 0 X500); Table 213: Low Watermark Maximum Receive Frames Register (Offset 0 X504)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Ethernet MAC Control Registers Page 258
RECEIVE RULES VALUE/MASK REGISTERS (OFFSET RULE N: 0X484 + 8*N)
This register is either a 32-bit left justified value, or a 16-bit mask followed by a 16-bit value. The use of the field is determined
by the mask bit of the corresponding rule.
RECEIVE RULES CONFIGURATION REGISTER (OFFSET 0X500)
LOW WATERMARK MAXIMUM RECEIVE FRAMES REGISTER (OFFSET 0X504)
This register is useful for flow control to prevent dropped packets.
Table 211: Receive Rules Value/Mask Register (Offset 0x484)
Bit Field Description Init Access
31:16 Mask/Value For each bit set, the corresponding bit in the Value field is
ignored during the rule match process. If bit 26 of the
corresponding rule control register is set, the field is used
as an additional 16-bit value for rule comparison.
0R/W
15:0 Value This field specifies a 16-bit value for rules comparison. 0 R/W
Table 212: Receive Rules Configuration Register (Offset 0x500)
Bit Field Description Init Access
31:8 Reserved Reserved. 0 RO
7:3 No Rules Matches
Default Class
Specifies the default class of service for the frame if no
rules are matched. A value of 1 is the highest priority and
a value of 16 is the lowest priority. A value of zero will
cause the frame to be discarded.
0R/W
2:0 Reserved Reserved. 0 RO
Table 213: Low Watermark Maximum Receive Frames Register (Offset 0x504)
Bit Field Description Init Access
31:21 Reserved Reserved. 0 RO
20:16 Tx FIFO Almost Empty
Threshold (BCM5722,
BCM5755,
BCM5755M,
BCM5756M, BCM5757
only)
When the remaining entries of Tx FIFO are less than this
threshold, the TXFIFO_Almost_Empty will be asserted.
This value is used in conjunction with the bit-31 of “Buffer
Manager Mode Register (Offset 0x4400)” on page 306 to
present EMAC TxFIFO underrun.
0xC R/W
Reserved (other
devices)
–0RO
15:0 Low Watermark Max
Receive Frames
Specifies the number of good frames to receive after RX
MBUF Low Watermark has been reached. After the RX
MAC receives this number of frames, it will drop
subsequent incoming frames until the MBUF High
Watermark is reached. Default to zero (i.e., drop frames
once RX MBUF Low Watermark is reached).
0R/W