Broadcom BCM5722 - Table 459: Packet bist Register (Offset 0 X7 D50)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 403 PCIe Registers Document 5722-PG101-R
PACKET BIST REGISTER (OFFSET 0X7D50)
1 Invert CRC Force entire LCRC to be inverted. 0 R/W
0 Send Bad CRC Force last bit of LCRC to be inverted. 0 R/W
Table 459: Packet BIST Register (Offset 0x7D50)
Bit Field Description Init Access
31:24 Reserved Write as 0, ignore when read. 0 RO
23 Packet Checker
Locked
Packet checker has locked to received data sequence. 0 RO
22 Receive Mismatch Receive data or packet length did not match pseudo-random
sequence. This bit sticks high and can only be cleared by
disabling the packet generator test mode or clearing the
Transmit Start bit.
0RO
21 Enable Random TLP
Length
• 1 = Transmit random length TLPs.
• 0 = Transmit fixed length TLPs.
1R/W
20:10 TLP Length Transmit TLP length is equal to this field + 3 DWORDS. When
sending random length TLPs, this field is ANDed with the
random generator output in order to limit the maximum length.
0x1FF R/W
9 Enable Random IPG
Length
• 1 = Transmit random length IPGs.
• 0 = Transmit fixed length IPGs.
1R/W
8:2 IPG Length Transmit IPG length is equal to this field + two DWORDS.
When sending random length IPGs, this field is ANDed with
the random generator output in order to limit the maximum
length.
0x1F R/W
1 Transmit Start Start transmitting TLPs. TLP transmission will be halted when
this bit is cleared or when error condition occurs (receive data
mismatch, DLLP error or TLP error).
1R/W
0 Enable Packet
Generator Test Mode
Transmit continuous stream of random or fixed length TLPs
containing pseudorandom data, separated by random or fixed
length IPGs. If TLPs are looped back, received TLPs are
checked vs. expected length and data content. Received
TLPs will be passed through retry buffer if the Store Receive
TLPs bit is set in the test register.
0R/W
Table 458: Data Link Test Register (Offset 0x7D4C) (Cont.)
Bit Field Description Init Access