Broadcom BCM5722 - Table 370: Smbus Input Register (Offset 0 X6 C04)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 357 ASF Support Registers Document 5722-PG101-R
SMBUS INPUT REGISTER (OFFSET 0X6C04)
1 Timestamp Counter
Enable
Set to enable the time stamp counter. 0 R/W
0 ASF Reset Soft reset bit for the ASF and SMBus interface blocks. When
set, the blocks will be reset. The bit is self clearing.
0R/W
Note: Some versions of the BCM5722 Ethernet controller insert the SMBus Address byte from SMBus messages
that should be filtered when the SMB ADDR filter is enabled. Broadcom recommends that customers writing their
own SMBus interface routines not enable the SMB ADDR filter and perform SMBus address filtering in their
software.
Table 370: SMBus Input Register (Offset 0x6C04)
Bit Field Description Init Access
31:14 Reserved. – 0 R/W
13:11 SMB Input Status Value is set by the SMBus interface when the SMB Input
Done bit is set. The value is encoded to the following:
• 000 = Reception OK.
• 001 = PEC error during reception.
• 010 = SMBus Input FIFO overflowed during reception.
• 011 = SMBus stopped unexpectedly during reception.
• 100 = SMBus timed out during reception.
000 R/W
10 SMBus In Firstbyte Set by the SMBus interface block for the first byte
received in the transfer.
0R/W
9 SMBus In Done Set by the SMBus block when the Data Input field has the
last data byte of the transfer.
0W2C
8 SMBus In Ready Set by the SMBus interface block when the Data Input
field is valid.
0R/W
7:0 SMBus Data In Input data from the SMBus interface. 0 R/W
Note: The BCM5722 Ethernet controller uses a 5-byte internal input FIFO for SMBus messages that must be
cleared if an error is indicated by the SMB Input Status field. This FIFO is cleared by continually reading the
SMBus Data In field until the SMBus In Done bit is set, then clearing the SMBus In Done bit by writing a 1.
Table 369: ASF Control Register (Offset 0x6C00) (Cont.)
Bit Field Description Init Access