Broadcom BCM5722 - Table 342: Mode Control Register (Offset 0 X6800)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 333 General Control Registers Document 5722-PG101-R
MODE CONTROL REGISTER (OFFSET 0X6800)
0x6894–0x6897 Reserved
0x6898–0x689B Chip mode Register
0x689C–0x689F Energy_Det Timer Register
0x68A0–0x68A3 Reserved
0x68A4–0x68A7 Power management Debug Register
0x68A8–0x68AF Reserved
0x68B0–0x68B3 Energy_Det Control Register
0x68B4–0x68ff Reserved
Table 342: Mode Control Register (Offset 0x6800)
Bit Field Description Init Access
31:29 Reserved – 0 RO
28 Interrupt on Flow Attention Cause a host interrupt when an enabled flow attention occurs. 0 R/W
27 Interrupt on DMA Attention Cause a host interrupt when an enabled DMA attention
occurs.
0R/W
26 Interrupt on MAC Attention Cause a host interrupt when an enabled MAC attention
occurs.
0R/W
25 Interrupt on RX RISC
Attention
Cause a host interrupt when an enabled RX RISC attention
occurs.
0R/W
Reserved (BCM5906 only) – 0 RO
24 Reserved – 0 RO
23 Receive No Pseudo-header
Checksum
Do not include the pseudoheader in the TCP or UDP
checksum calculations. To obtain the correct checksum, the
driver must add the TCP/UDP checksum field to the pseudo-
header checksum.
0R/W
22 Reserved – 0 RO
21 NVRAM Write Enable The host must set this bit before attempting to update the
Flash or SEEPROM
0R/W
20 Send No Pseudo-header
Checksum
Do not include the pseudoheader in the TCP or UDP
checksum calculations. To obtain the correct checksum, the
driver must seed the TCP/UDP checksum field with the
pseudoheader checksum.
0R/W
19:18 Reserved – 00
17 Host Send BDs Use host-based BD rings instead of NIC-based BD rings. 0 R/W
16 Host Stack Up The host stack is ready to receive data from the NIC. 0 R/W
15 Force 32-bit PCI Force PCI operation as if on a 32-bit PCI bus. 0 R/W
14 Don’t Interrupt on Receives Never cause an interrupt on receive return ring producer
updates.
0R/W
13 Don’t Interrupt on Sends Never cause an interrupt on send BD ring producer updates. 0 R/W
12 Reserved – 0
Table 341: General Control Registers—BCM5906 Only (Cont.)
Field Description