Broadcom BCM5722 - Table 157: Uncorrectable Error Mask Register (Offset 0 X108)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 225 PCIe-Enhanced Capabilities Document 5722-PG101-R
UNCORRECTABLE ERROR MASK REGISTER (OFFSET 0X108)
Table 157: Uncorrectable Error Mask Register (Offset 0x108)
Bit Field Description Init Access
31:21 Reserved – 0 RO
20 Unsupported Request
Error Mask
Setting this bit will mask Unsupported Request errors. 0 R/W
19 ECRC Error Mask Setting this bit will mask ECRC errors. 0 R/W
18 Malformed TLP Mask Setting this bit will mask Malformed TLP errors. 0 W2C
17 Receiver Overflow
Mask
Setting this bit will mask Receiver Overflow errors. 0 R/W
16 Unexpected
Completion Mask
Setting this bit will mask Unexpected Completion errors. 0 R/W
15 Completer Abort Mask Setting this bit will mask Completer Abort errors. 0 R/W
14 Completion Timeout
Mask
Setting this bit will mask Completion Timeout errors. 0 R/W
13 Flow Control Protocol
Error Mask
Setting this bit will mask Flow Control Protocol errors. 0 R/W
12 Poisoned TLP Mask Setting this bit will mask Poisoned TLP errors. 0 R/W
11:5 Reserved – 0 RO
4 Data Link Protocol
Error Mask
Setting this bit will mask Data Link Protocol errors. 0 R/W
3:1 Reserved – 0 RO
0 Training Error Mask Setting this bit will mask Training errors. 0 R/W