Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Expansion ROM Registers Page 212
EXPANSION ROM REGISTERS
EXPANSION ROM BAR SIZE REGISTER (OFFSET 0X88)
EXPANSION ROM ADDRESS REGISTER (OFFSET 0X8C)
This Register is for internal CPU use only.
Note: Expansion ROM registers do not apply to the BCM5906 device.
Table 134: Expansion ROM BAR Size Register (0x88)
Bit Field Description Init Access
31:4 Reserved – 0 RO
3:0 BAR Size
• 0000 = 64 KB
• 0001 = 128 KB
• 0010 = 256 KB
• 0011 = 512 KB
• 0100 = 1 MB
• 0101 = 2 MB
• 0110 = 4 MB
• 0111 = 8 MB
• 1000 = 16 MB
0000 R/W–CPU
None–PCI
Table 135: Expansion ROM Address Register (Offset 0x8C)
Bit Field Description Init Access
31 ROM Req. ROM Request. The PCI Interface Block will set the ROM
Req whenever it detects that the Host is accessing the
Serial EPROM memory space.
0R/W–CPU
a
30:24 Reserved – 0 RO
23:0 Address Expansion ROM Address. Address field of the Memory
Read transaction is loaded into this field if the address
matches the Expansion ROM address space as defined
by the Expansion ROM BAR and size registers. The
internal processors utilize this field to execute the ROM
read.
0R/W–CPU
a
a. PCI Access via Memory Read command with the ROM BAR address.