Broadcom BCM5722 - Table 408: bist Registers; Table 409: bist Control Register (Offset 0 X7400); Table 410: bist Status Register (Offset 0 X7404)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R BIST Registers Page 378
BIST REGISTERS
BIST CONTROL REGISTER (OFFSET 0X7400)
BIST STATUS REGISTER (OFFSET 0X7404)
This register definition is applicable to BCM5787, BCM5787M, BCM5754, and BCM5754M devices only.
Table 408: BIST Registers
Address Description
0x7400 BIST Control Register
0X7404 BIST Status Register
0x7408–0x7BFF Reserved
Table 409: BIST Control Register (Offset 0x7400)
Bit Field Description Init Access
31:6 Reserved –
5 BIST_SEL When set, the internal BIST control is selected. When clear,
the external control is selected. This bit is overridden by
BIST external.
0 R/W
4 BIH Memory Burn In. 0 R/W
3 BIST_RM Trim Bit. 0 R/W
2BIST_CCMTrim Bit. 0 R/W
1 BIST_EN Enable Internal BIST. 0 R/W
0 BIST_RESET BIST reset. 0 R/W
Table 410: BIST Status Register (Offset 0x7404)
Bit Field Description Init Access
31:8 Reserved –
7 CPU Boot ROM BIST
Fail
Status indicating flash buffer BIST test has failed. 1 RO
6 CPU Boot ROM BIST
Done
Status indicating flash buffer BIST test has completed. 0 RO
5 Retry Buffer BIST Fail Status indicating BIST test has failed. 1 RO
4 Retry Buffer BIST Done Status indicating BIST has completed when set (RETRY
Buffer).
0RO
3 TxMbuf & Misc_BD
BIST Fail
Status indicating BIST test has failed. 1 RO
2 TxMbuf & Misc_BD
BIST Done
Status indicating BIST has completed when set (TXMBUF). 0 RO
1 RxMbuf BIST Fail Status indicating BIST test has failed. 1 RO
0 RxMbuf BIST Done Status indicating BIST has completed when set (RXMBUF). 0 RO