Broadcom BCM5722 - Table 441: Data Link Attention Register (Offset 0 X7 D08); Table 442: Data Link Attention Mask Register (Offset 0 X7 D0 C)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R PCIe Registers Page 398
DATA LINK ATTENTION REGISTER (OFFSET 0X7D08)
DATA LINK ATTENTION MASK REGISTER (OFFSET 0X7D0C)
Table 441: Data Link Attention Register (Offset 0x7D08)
Bit Field Description Init Access
31:5 Reserved Write as 0, ignore when read. 0 –
4 Data Link Layer Error
Attention Indicator
Asserted when any of the following bits are set in the data
link status register:
• FC Update Timeout.
• FC Receive Overflow.
• FC Protocol Error.
• Data Link Protocol Error.
• Replay Rollover or Replay Timeout (read the “Data
Link Status Register (Offset 0x7D04)” on page 397 to
clear this bit).
0RO
3 NAK Received Counter
Attention Indicator
Set when NAK received counter value is greater than or
equal to attention threshold.
Cleared when counter is read.
0RO
2 DLLP Error Counter
Attention Indicator
Set when DLLP error counter value is greater than or
equal to attention threshold.
Cleared when counter is read.
0RO
1 TLP Bad Sequence
Counter Attention
Indicator
Set when TLP bad sequence counter value is greater
than or equal to attention threshold.
Cleared when counter is read.
0RO
0 TLP Error Counter
Attention Indicator
Set when TLP error counter value is greater than or equal
to attention threshold.
Cleared when counter is read.
0RO
Table 442: Data Link Attention Mask Register (Offset 0x7D0C)
Bit Field Description Init Access
31:8 Reserved Write as 0, ignore when read. 0 RO
7:5 Attention Mask Reserved for additional attention bits. 0 R/W
4 Data Link Layer Error
Attention Mask
Data link error attention bit causes assertion of data link
attention output when mask bit is set to 1.
0R/W
3 NAK Received Counter
Attention Mask
NAK received counter attention bit causes assertion of
data link attention output when mask bit is set to 1.
0R/W
2 DLLP Error Counter
Attention Mask
DLLP error counter attention bit causes assertion of data
link attention output when mask bit is set to 1.
0R/W
1 TLP Bad Sequence
Counter Attention Mask
TLP bad sequence counter attention bit causes assertion
of data link attention output when mask bit is set to 1.
0R/W
0 TLP Error Counter
Attention Mask
TLP error counter attention bit causes assertion of data
link attention output when mask bit is set to 1.
0R/W