Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Page 46
Send Buffer Descriptors
The format of an individual send buffer descriptor is shown in Table 12.
The fields are defined as follows:
• The Host Address field contains the 64-bit host address of the buffer that the descriptor points to. A length of 0 indicates
that the descriptor does not have a buffer associated with it.
• The Flags field contains bits flags that contain control information for the device for transmitting the packets. The
defined flags are listed in Table 13.
For BCM5906/BCM5906M, 0x0C[31:16] contains the 16-bit Launch Time for Isochronous (ISO) send buffer descriptors.
Table 12: Send Buffer Descriptors Format
Offset (Bytes) 31 16 15 0
0x00 Host Address [63:0]
0x04
0x08 Length [15:0] Flags [15] HdrLen [7:5] Flags [11:0]
0x0c HdrLen [4:0] MSS [10:0] VLAN Tag
Table 13: Defined Flags for Send Buffer Descriptors
Bits Name Description
0 TCP_UDP_CKSUM
a
If set to 1, the controller replaces the TCP/UDP checksum field of TCP/UDP packets with
the hardware calculated TCP/UDP checksum for the packet associated with this
descriptor.
1 IP_CKSUM If set to 1, the controller replaces the IPv4 checksum field of TCP/UDP packets over IPv4
with the hardware calculated IPv4 checksum for the packet associated with this
descriptor. This bit should only be set in the descriptor that points to the buffer that
contains the IPv4 header. It is assumed that the IPv4 header is contained in a single
buffer.
2 PACKET_END If set to 1, the packet ends with the data in the buffer pointed to by this descriptor.
5:3 Reserved Should be set to 0.
6VLAN_TAG
a
If set to 1, the device inserts an IEEE 802.1Q VLAN tag into the packet. The 16-bit TCI
(Tag Control Information) field of four byte VLAN tag comes from the VLAN Tag field in
the descriptor.
7 COAL_NOW If set to 1, the device immediately updates the Send Consumer Index after the buffer
associated with this descriptor has been transferred via DMA to NIC memory from host
memory. An interrupt may or may not be generated according to the state of the interrupt
avoidance mechanisms. If this bit is set to 0, then the Consumer Index is only updated
as soon as one of the host interrupt coalescing conditions has been met.
8 CPU_PRE_DMA If set to 1, the controller’s internal CPU is required to act upon the packet before the
packet is given to the internal
Send Data Initiator state machine. Normally this bit should
be set to 0.
9CPU_POST_DMA
a
If set to 1, the controller’s internal CPU is required to act upon the packet before the
packet is given to the internal
Send Data Completion state machine. Normally this bit
should be set to 0.
10 Tx Time-Sync packet
(BCM5906, BCM5906M
ISO send BD only.
Reserved (all others)
If set to 1, indicates that this is a time-sync packet used for Isochronous packet flow in
the BCM5906 device family.
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