Broadcom BCM5722 - Table 383: Auxiliary Smbus Master Command Register (Offset 0 X6 C48); Table 384: Auxiliary Smbus Block Data Register (Offset 0 X6 C4 C)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R ASF Support Registers Page 364
AUXILIARY SMBUS MASTER COMMAND REGISTER (OFFSET 0X6C48)
AUXILIARY SMBUS BLOCK DATA REGISTER (OFFSET 0X6C4C)
1Kill • 0 = This will allow the Master Controller interface function to
continue normally.
• 1 = Stop the current Master transaction in process. This sets
the failed status bit and asserts interrupt selected by the SMB
interrupt select field.
0R/W
0 Interrupt Enable
• 0 = Disable the generation of Attention
• 1 = Enable the generation of Attention on the completion of
current Master transaction.
0R/W
Table 383: Auxiliary SMBus Master Command Register (Offset 0x6C48)
Bit Field Description Init Access
31:24 SMBus Data 1 This register should be programmed with a value to be transmitted in the
data 1 field of an SMBus Master Interface Word Transaction.
0x00 R/W
23:16 SMBus Data 0 This register should be programmed with a value to be transmitted in the
data 0 field of an SMBus Master Interface Word Transaction.
• For Block write commands, the count of the memory should be stored
in this field. The value of this register is loaded into the block transfer
count field. This register must be set to a value between 1 and 32 for
block command counts.
• For block reads, count received from SMBus device is stored here.
0x00 R/W
15:9 SMBus Address This field contains the 7-bit address of the targeted slave device. 0 R/W
8 SMBus Read or Write
• 0 = Execute a Write Command.
• 1 = Execute a Read Command.
0R/W
7:0 SMBus Master
Command
This field contains the data transmitted in the command field of SMBus
Master transaction.
0x00 R/W
Table 384: Auxiliary SMBus Block Data Register (Offset 0x6C4C)
Bit Field Description Init Access
31:8 Reserved – 0 R/W
7:0 SMBus Block Data This register is used to transfer data into or out of the block
data storage array. For Block read and Write commands.
0x00 R/W
Table 382: Auxiliary SMBus Master Control Register (Offset 0x6C44) (Cont.)
Bit Field Description Init Access