Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Transceiver Registers (BCM5906/BCM5906M) Page 494
Extended FIFO Enable
Controls the extended receive FIFO mechanism. This bit may have to be set if the Jumbo Packet Enable bit is set.
100BASE-X Auxiliary Status Register
SMII Overrun/Underrun Error
The PHY returns a 1 in bit 11, when the SMII receive FIFO encounters an overrun or underrun condition.
Locked
The PHY returns a 1 in bit 9 when the de-scrambler is locked to the incoming data stream. Otherwise, it returns a 0.
Current 100BASE-X Link Status
The PHY returns a 1 in bit 8 when the 100BASE-X link status is good. Otherwise, it returns a 0.
Table 547: 100BASE-X Auxiliary Status Register (Address 17d, 11h)
Bit Name R/W Description Default
15:12 Reserved - - 0
11 SMII Overrun/Underrun
Detected
RO 1 = Error detected 0 = No error 0
10 Reserved - - X
9 Locked RO 1 = Descrambler locked
0 = Descrambler unlocked
0
8 Current 100BASE-X Link
Status
RO 1 = Link pass 0 = Link fail 0
7 Remote Fault RO 1 = Remote fault detected
0 = No remote fault detected
0
6 Reserved - - 0
5 False Carrier Detected RO
LH
1 = False carrier detected since last read
0 = No false carrier since last read
0
4 Bad ESD Detected RO
LH
1 = ESD error detected since last read
0 = No ESD error since last read
0
3 Receive Error Detected RO
LH
1 = Receive error detected since last read
0 = No receive error since last read
0
2 Transmit Error Detected RO
LH
1 = Transmit error code received since last read
0 = No transmit error code received since last read
0
1 Lock Error Detected RO
LH
1 = Lock error detected since last read
0 = No lock error since last read
0
0 MLT3 Code Error
Detected
RO
LH
1 = MLT3 code error detected since last read
0 = No MLT3 code error since last read
0
R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read
operation. Use default values of reserved bit(s) when writing to reserved bit(s).
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