Broadcom BCM5722 - Table 372: ASF Watchdog Timer Register (Offset 0 X6 C0 C); Table 373: ASF Heartbeat Timer Register (Offset 0 X6 C10)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 359 ASF Support Registers Document 5722-PG101-R
ASF WATCHDOG TIMER REGISTER (OFFSET 0X6C0C)
ASF HEARTBEAT TIMER REGISTER (OFFSET 0X6C10)
8 SMB Output Ready Set to indicate the SMB Data Output field has valid data.
Cleared by the SMBus interface block when the bye is
transferred to the internal FIFO.
0R/W
7:0 SMB Data Output Outgoing data byte for the SMB transaction. 0 R/W
Note: The BCM5722 Ethernet controller uses a 5-byte internal output FIFO for SMBus messages. When an
SMBus message is begun by setting the SMB Output Start bit, the software must write the next output byte within
100 µs, or an underflow may occur and invalidate the entire SMBus message.
Table 372: ASF Watchdog Timer Register (Offset 0x6C0C)
Bit Field Description Init Access
31:8 Reserved – 0 R/W
7:0 Watchdog timer A countdown timer which decrements at the rate of one
tick per second. When the counter reaches a value of
zero, the corresponding timeout bit is set in the ASF
Control Register (see “ASF Control Register (Offset
0x6C00)” on page 356). The timer stops decrementing
when it reaches the zero value.
0R/W
Table 373: ASF Heartbeat Timer Register (Offset 0x6C10)
Bit Field Description Init Access
31:16 Reserved. – 0 R/W
15:0 Heartbeat timer A countdown timer which decrements at the rate of one
tick per second. When the counter reaches a value of
zero, the corresponding timeout bit is set in the ASF
Control Register (see “ASF Control Register (Offset
0x6C00)” on page 356). The timer stops decrementing
when it reaches the zero value.
0R/W
Table 371: SMBus Output Register (Offset 0x6C08) (Cont.)
Bit Field Description Init Access