BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 179 MSI Document 5722-PG101-R
MSI
PCI Specification 2.2 defines a new mechanism for a device to request services by its device driver. It is called Message
Signaled Interrupt (MSI). MSI will eventually deprecate the traditional interrupt mechanism. In MSI, device DMAs a specified
DWORD data to a specified host address if it needs to request services by its device driver. The MSI state machine can be
enabled/disabled by setting/resetting the Enable bit of MSI Mode register (offset 0x6000). By default, this bit is set to 1
indicating that the MSI state machine is enabled. The main advantages of MSI generation versus using a traditional interrupt
are as follows:
• Eliminates the need for interrupt signal trace on the PCI device.
• Eliminates the need to perform a dummy read from the device by the device driver in its interrupt service routine. The
dummy read is done at the beginning of ISR to force all posted memory writes to be flushed to the host memory.
TRADITIONAL INTERRUPT SCHEME
A simplified block diagram showing traditional interrupt scheme is depicted in Figure 64.
Figure 64: Traditional Interrupt Scheme
BCM5700
PCI Host
Bridge
Host
Memory
CPU
Interrupt
Interrupt A
PCI Bus
Host Bus
BCM5722 Ethernet
Controller
PCI Host
Bridge
Host
Memory
CPU
Interrupt
Controller
Interrupt
Controller
To Next Page
Loading...