Broadcom BCM5722 - Table 540: PHY Identifier Registers (Addresses 02 D and 03 D, 02 H and 03 H)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 487 Transceiver Registers (BCM5906/BCM5906M) Document 5722-PG101-R
Auto-Negotiation Complete
Bit 5 of the Status register returns a 1 if the auto-negotiation process has been completed and the contents of registers 4, 5
and 6 are valid.
Auto-Negotiation Capability
The PHY core is capable of performing IEEE Auto-negotiation and returns a 1 when bit 4 of the Status register is read,
regardless of whether or not the auto-negotiation function has been disabled.
Link Status
The PHY core returns a 1 on bit 2 of the Status register when the link state machine is in Link Pass, indicating that a valid
link has been established. Otherwise, it returns 0. When a link failure occurs after the Link Pass state has been entered, the
Link Status bit is latched at 0 and remains so until the bit is read. After the bit is read, it becomes 1 if the Link Pass state has
been entered again.
Jabber Detect
10BASE-T operation only. The PHY core returns a 1 on bit 1 of the Status register if a jabber condition has been detected.
After the bit is read, or if the chip is reset, it reverts to 0.
Extended Capability
The PHY core supports extended capability registers and returns a 1 when bit 0 of the Status register is read. Several
extended registers have been implemented in the PHY core and their bit functions are defined later in this section.
PHY Identifier Registers
Broadcom Corporation has been issued an Organizationally Unique Identifier (OUI) by the IEEE. It is a 24-bit number (00-
0A–F7) expressed as hexadecimal values. This 24 bit OUI number is represented in binary as OUI[1:24] = 00000000
01010000 11101111. That number, along with the Broadcom model number for the 0.18 Micron PHY core and Broadcom
revision number, is placed into two MII registers. The translation from OUI, model number, and revision number to the PHY
Identifier register occurs as follows:
PHYID HIGH[15:0] = OUI[3:18]
PHYID LOW[15:0] = OUI[19:24] + MODEL[5:0] + REV[3:0]
Note that the two most significant bits of the OUI are not represented (OUI[1:2]).
Table 540: PHY Identifier Registers (Addresses 02d and 03d, 02h and 03h)
Bit Name R/W Description Default
15:0 MII Address 00010 RO PHYID HIGH 0040h
15:0 MII Address 00011 RO PHYID LOW 6xxxh