Broadcom BCM5722 - Table 109: Minimum Grant Register (Offset 0 X3 E); Table 110: Maximum Latency Register (Offset 0 X3 F)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R PCI Configuration Registers Page 196
MINIMUM GRANT REGISTER (OFFSET 0X3E)
This register does not apply to PCIe devices.
MAXIMUM LATENCY REGISTER (OFFSET 0X3F)
This register does not apply to PCIe devices.
Table 109: Minimum Grant Register (Offset 0x3E)
Bit Field Description Init Access
7:0 Reserved – 0 RO
Table 110: Maximum Latency Register (Offset 0x3F)
Bit Field Description Init Access
7:0 Reserved – 0 RO