BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 199 PCI Power Management Capabilities Document 5722-PG101-R
POWER MANAGEMENT DATA REGISTER (OFFSET 0X4F)
This 8-bit register provides a mechanism for the device to report state dependent operating data such as power consumed
or heat dissipation. Typically, the data returned through this register is a static copy of the device’s worst case DC
characteristics data sheet. This data, when made available to system software, could be used to intelligently make decisions
about power budgeting, cooling requirements, etc.
The type of data returned by this register is dependent on the Data Select field in the PMCSR. The Data Select field, could
indicate that this register should return power consumption for states D0–D3 or power dissipation for states D0–D3.
Depending upon which data point is requested, the device will retrieve the corresponding information from its internal Power
Dissipation or Power Consumption registers. These registers are programmed by the device CPU at boot time with the
correct power values for the various states. The device boot CPU will retrieve this power information from the NVRAM at
boot time.
The value returned in this register is scaled by the Data Scale field in the PMCSR. The firmware returns the maximum
wattage at gigabit speed.
Table 115: Power Management Data Register (Offset 0x4F)
Bit Field Description Init Access
7:0 PM Data Register Contains the power management data indicated by the
Data Select field in the PMCSR.
0RO
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