Broadcom BCM5722 - Table 492: Receive Error Counter (Phy_Addr = 0 X1, Reg_Addr = 12 H); Table 493: False Carrier Sense Counter (Phy_Addr = 0 X1, Reg_Addr = 13 H)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Transceiver Registers Page 432
RECEIVE ERROR COUNTER (PHY_ADDR = 0X1, REG_ADDR = 12H)
This counter increments each time the BCM5722 Ethernet controller receives a non-collision packet containing at least one
receive error (freezes at the maximum value FFFFh). The counter automatically clears when read.
FALSE CARRIER SENSE COUNTER (PHY_ADDR = 0X1, REG_ADDR = 13H)
S3MII Error Counter increments each time the BCM5722 Ethernet controller detects a S3MII overrun/underrun event. False
Carrier Sense Counter increments each time the BCM5722 Ethernet controller detects a false carrier on the receive input.
These counters freeze at the maximum value FFh. The counters automatically clear when read.
Table 492: Receive Error Counter (PHY_Addr = 0x1, Reg_Addr = 12h)
Bit Field Description Init Access
15:0 Receive Error Counter Number of non-collision packets with receive errors since
last read.
0000h R/W
Table 493: False Carrier Sense Counter (PHY_Addr = 0x1, Reg_Addr = 13h)
Bit Field Description Init Access
15:8 Reserved –
7:0 False Carrier Sense
Counter
Number of false carrier sense events since last read. 00h R/W