Broadcom BCM5722 - Table 190: Ethernet MAC Mode Register (Offset 0 X400)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 245 Ethernet MAC Control Registers Document 5722-PG101-R
ETHERNET MAC MODE REGISTER (OFFSET 0X400)
Table 190: Ethernet MAC Mode Register (Offset 0x400)
Bit Field Description Init Access
31:27 Reserved – 0 RO
26 Free Running ACPI When this bit is set, the ACPI state machine will continue
running when a match is found. When this bit is clear, the
ACPI state machine will halt when a match is found.
0R/W
25 Halt Interesting Packet PME When this bit is set, the WOL signal will not be asserted on an
interesting packet match.
0R/W
24 Keep Frame in WOL –
23 Enable FHDE Enable the receive Frame Header DMA engine. Must be set
for normal operation.
0R/W
22 Enable RDE Enable the Receive DMA engine. Must be set for normal
operation.
0R/W
21 Enable TDE Enable Transmit DMA engine. 0 R/W
20 Reserved – 0 RO
19 ACPI Power-on Enable Enable WOL filters when in power-down mode. 0 R/W
18 Magic Packet Detect Enable Enable Magic Packet Detection. 0 R/W
17 Reserved – 0 R/W
16 Flush TX Statistics Write transmit statistics to external memory. This bit is self-
clearing.
0R/W
15 Clear TX Statistics Clear transmit statistics internal RAM. This bit is self-clearing. 0 R/W
14 Enable TX Statistics Enable transmit statistics external updates. 0 R/W
13 Flush RX Statistics Write receive statistics to external memory. This bit is self-
clearing.
0R/W
12 Clear RX Statistics Clear receive statistics internal RAM. This bit is self-clearing. 0 R/W
11 Enable RX Statistics Enable receive statistics external updates. 0 R/W
10 Reserved – 0 RO
9 Max Defer Enable Max Deferral checking statistic. 0 R/W
8 Enable TX Bursting Enable transmit bursting in gigabit half-duplex mode. 0 R/W
7 Tagged MAC Control Allow the MAC to receive tagged MAC control packets. 0 R/W
6:5 Reserved – 00 RO
4 Loopback Mode When set, an internal loopback path is enabled from the
transmit MAC to the receive MAC. This bit is provided for
diagnostic purposes only.
3:2 Port mode These bits determine what interface the port is running:
• 11 = TBI (ten bit interface)
• 10 = GMII
• 01 = MII
• 00 = None (default)
01 R/W
1 Half-duplex When set, the MII/GMII interface is configured to operate in
half-duplex mode and the CSMA/CD state machines in the
MAC are set to half-duplex mode. The default value is 0.
0R/W
0 Global MAC Reset When this bit is set to 1 the MAC state machine is reset. This
is a self-clearing bit. The default value is 0.
0R/W