Broadcom BCM5722 - Figure 56: Default Translation (no Swapping) on 64-Bit PCI; Figure 57: Default Translation (no Swapping) on 32-Bit PCI; Table 59: RCB (Big Endian 32-Bit Format)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Endian Control (Byte and Word Swapping) Page 144
ENABLE ENDIAN WORD SWAP AND ENABLE ENDIAN BYTE SWAP BITS
The Enable Endian Word Swap, and Enable Endian Byte Swap bits affect whether words or bytes are swapped during target
PCI accesses. Thus, these bits affect the byte order when the host is directly reading/writing to registers or control structures
that are physically located on the BCM5722 Ethernet controller. These bits do not affect the byte ordering of packet data or
other structures that are mastered (DMAed) by the BCM5722 Ethernet controller.
When the BCM5722 Ethernet controller is accessed via PCI (which is little endian) as a PCI target, the BCM5722 Ethernet
controller must implicitly map those accesses to internal structures that use a 64-bit Big Endian architecture. In the default
case where no swap bits are set the BCM5722 Ethernet controller maps PCI data to internal structures shown in Figure 56
and Figure 57.
Figure 56: Default Translation (No Swapping) on 64-Bit PCI
Internal Byte Ordering PCI Byte Ordering
Figure 57: Default Translation (No Swapping) on 32-bit PCI
As illustrated above, because the BCM5722 Ethernet controller uses an internal 64-bit big endian architecture, it will map
(by default) the most significant byte of an 8-byte (64-bit) internal quantity to the most significant byte on a 64-bit PCI bus.
This works nicely for quantities (fields) that are 64 bits in size (e.g., a host physical address). However, this can be confusing
for quantities that are 32 bits in size. Without Word Swapping enabled, the host could easily access the wrong 32-bit quantity
when making a 32-bit access.
Take, for example, a Ring Control Block (RCB). RCBs are on-chip structures and read/written by the host via PCI target
accesses. The table below shows the big-endian layout of an on-chip RCB:
MSB LSB
Internal Byte # 01234567
Internal Bit #63484732311615 0
Example Content 88 89 8A 8B 8C 8D 8E 8F
MSB LSB
PCI Byte # 76543210
PCI Bit #63484732311615 0
Example Content 88 89 8A 8B 8C 8D 8E 8F
31 1615 0 31 1615 0
0x00
88 89 8A 8B 8C 8D 8E 8F
0x00
0x04
8C 8D 8E 8F 88 89 8A 8B
0x04
Table 59: RCB (Big Endian 32-bit format)
Byte # 0 1 2 3
Bit # 31 16 15 0
MSB Host Ring Address 0x00
LSB 0x04
MSB MAX_Len LSB Flags 0x08
NIC Ring Address 0x0C