Broadcom BCM5722 - Figure 32: Relationship between Send Buffer Descriptors

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Send Rings Page 76
HOST-BASED SEND RING
The send buffer descriptors of host based send ring reside in host memory.
The host-based send ring will have up to 512 buffer descriptors, which are periodically and transparently DMAed to a staging
area inside the NIC’s internal memory where they are waiting to be consumed. The staging area can hold up to 128 entries
per-ring, and BCM5722 Ethernet controller tries to keep the staging area full at all times by constantly monitoring the
consumer and producer index (the algorithm for accomplishing this is beyond the scope of this manual). The staging areas
are located at a starting offset 0x4000 of NIC memory. Figure 32 illustrates the relationship between the send buffer
descriptors in host memory and the staging area in NIC memory.
Whenever the host software initializes new buffer descriptors, its send ring producer index is incremented by the number of
descriptors. The new index is then written to the corresponding send ring host producer index mailbox register (starting at
offset 0x300 for host standard and flat modes and offset 0x5900 for indirect mode—see “Send BD Ring Host Producer Index
Register (Offset 0x300–0x307)” on page 240 and “Send BD Ring Host Producer Indices Registers (Offset 0x5900–0x5907)”
on page 325), which may trigger the BCM5722 Ethernet controller to DMA the descriptors to its staging area. Eventually, the
buffer descriptors are processed, and the data associated with these descriptors is transferred onto the network.
Figure 32: Relationship Between Send Buffer Descriptors
The BCM5722 Ethernet controller maintains the send ring consumer index, which is incremented as it processes the
descriptors. The BCM5722 Ethernet controller informs the host software of its progress by updating the send ring consumer
index in the status block. The host software uses the send ring consumer index and its producer index to determine the
empty slots in the ring. The BCM5722 Ethernet controller implements an algorithm that periodically DMAs the status block
to host memory in an efficient manner.
Send BD 1
Send BD 2
Send BD 3
Send BD 4
Send BD 5
Send BD 7
Send BD 8
..
.
Send BD 6
Send BD 512
Send BD 1
Send BD 128
..
.
..
.
S
end Buffer Descriptors
in Host Memory
Send Buffer Descriptor
s
in NIC Memory
Producer
Consumer
Send BD n+2
Send BD n
Send BD n+1
DMA