Broadcom BCM5722 - Figure 66: MSI Data Field; MSI Address; MSI Data; PCI Configuration Registers

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 181 MSI Document 5722-PG101-R
Similar example in traditional interrupt scheme is used again here to illustrate MSI concept. The BCM5722 Ethernet
controller receives one or more packets from the networks. The BCM5722 Ethernet controller does the following:
• DMAs data of received packets to the host.
• DMAs receive buffer descriptors to receive return ring in the host memory.
• DMAs status block to the host memory.
• Writes specified DWORD data to specified host address.
In this mode, the BCM5722 Ethernet controller writes DWORD data to specified host address instead of generating an
interrupt. The specified data and address are configurable. The specified address is typically a memory-mapped IO port
within the PCI host bridge. The PCI host bridge is the gateway to the main memory controller. This means that the DWORD
data write (MSI message) to PCI host bridge is in the posted write buffers and was posted after the writes for the status block
update. It is the rule that PCI host bridge must perform posted writes in the same order that they were received. This means
that by the time MSI message arrives at the PCI host bridge, the status block has already been posted to the host memory.
Upon receipt of the MSI message write, the PCI host bridge generates the interrupt request to the processor. Interrupt
service routine of the device driver is invoked. It is not necessary to do a dummy read because updated status block is
already in the host memory.
PCI CONFIGURATION REGISTERS
Operating system/system software can configure the specified DWORD data and specified 64-bit host address for the device
with MSI_DATA (Offset 0x64) and MSI_Address register (Offset 0x5c), respectively.
MSI Address
This is a 64-bit field. MSI address at offset 0x5c and 0x60 should be programmed with the low-order and high-order bits of
the 64-bit physical address. If the host only supports 32-bit physical address, the high-order address should be programmed
with zeros.
MSI Data
This is a 16-bit field. The least significant three bits can be modified by the BCM5722 Ethernet controller when it writes MSI
message to host. The DWORD data for the MSI message is depicted as shown in Figure 66.
Figure 66: MSI Data FIeld
The BCM5722 Ethernet controller can support up to eight message types, and these MSI messages can be generated by
either of the two sources of:
• Host coalescing engine
• Firmware
All 0’s 16-bit MSI_Data
31 16 15 0
The BCM5700 MAC can only modify the three LSBs
All zeros
16-bit MSI_Data