Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Ethernet MAC Control Registers Page 250
WOL PATTERN CONFIGURATION REGISTER (OFFSET 0X434)
ETHERNET TRANSMIT RANDOM BACKOFF REGISTER (OFFSET 0X438)
This register is used to initialize the random backoff interval generator. It is implemented as a 10-bit linear feedback shift
register as follows:
random[9:0] = (random SRL 1) XOR 32l when random 9 = 1 else (random SRL 1) XOR 0
If the random generator is initialized to zero, then it will always remain a zero indicating that a no backoff internal is always
selected. It is recommended that this field be initialized with the same value that is written to the MAC Address Low register
in order to create additional randomness to the initial seed.
RECEIVE MTU SIZE REGISTER (OFFSET 0X43C)
This register defines the threshold above which a frame will be marked as oversize.
Table 197: WOL Pattern Configuration Register (Offset 0x434)
Bit Field Description Init Access
31:28 Reserved – 0 RO
27:16 ACPI offset Offset of a frame where the pattern comparison starts. 0 R/W
15:10 Reserved – 0 RO
9:0 ACPI Length Specifies the total number of 64-bit double words inside
the MISC_BD memory that are valid for ACPI. For GMII, it
should have a value of 2,4,6,... For MII, it should have a
value of 3,6,9,....
0x000 R/W
Table 198: Ethernet Transmit Random Backup Register (Offset 0x438)
Bit Field Description Init Access
31:10 Reserved Always 0. 0 RO
9:0 Random Backoff Seed For half-duplex, initialize with any nonzero seed. 0 R/W
Table 199: Receive MTU Size Register (Offset 0x43C)
Bit Field Description Init Access
31:16 Reserved Always 0. 0 RO
15:0 MTU 2-byte field which is the largest size frame that will be
accepted without being marked as oversize.
05F2h R/W