Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Buffer Manager Control Registers Page 310
BM HARDWARE DIAGNOSTIC 3 REGISTER (OFFSET 0X4454)
This 32-bit register provides debug information on the RXMBUF pointer.
RECEIVE FLOW THRESHOLD REGISTER (OFFSET 0X4458)
Table 305: BM Hardware Diagnostic 3 Register (Offset 0x4454)
Bit Field Description Init Access
31:25 Reserved – 0000000 RO
24:16 Next RXMBUF
Deallocation Pointer
The next RXMBUF that is to be deallocated. 000000000 RO
15:9 Reserved – 0000000 RO
8:0 Next RXMBUF
Allocation Pointer
The next RXMBUF that is to be allocated. 000000000 RO
Table 306: Receive Flow Threshold Register (Offset 0x4458)
Bit Field Description Init Access
31:16 Reserved – 0 RO
15:0 MBUF threshold Defines the integer number of MBUFs remaining before
the receive MAC will drop received frames.
0R/W